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212 Series of Decoders
Features
* * * * * * *
Operating voltage: 2.4V~12V Low power and high noise immunity CMOS technology Low standby current Capable of decoding 12 bits of information 12 Pair with Holteks 2 series of encoders Binary address setting Received codes are checked 3 times
* * * * *
Address/Data number combination - HT12D: 8 address bits and 4 data bits - HT12F: 12 address bits only Built-in oscillator needs only 5% resistor Valid transmission indicator Easy interface with an RF or an infrared transmission medium Minimal external components
Applications
* * * *
Burglar alarm system Smoke and fire alarm system Garage door controllers Car door controllers
* * * *
Car alarm system Security system Cordless telephones Other remote control systems
General Description
The 2 decoders are a series of CMOS LSIs for remote control system applications. They are 12 paired with Holteks 2 series of encoders (refer to the encoder/decoder cross reference tab l e ) . F or p r op er op er a t i on, a p a i r o f encoder/decoder with the same number of addresses and data format should be chosen. The decoders receive serial addresses and data 12 from a programmed 2 series of encoders that are transmitted by a carrier using an RF or an IR transmission medium. They compare the serial input data three times continuously with
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their local addresses. If no error or unmatched codes are found, the input data codes are decoded and then transferred to the output pins. The VT pin also goes high to indicate a valid transmission. The 2 series of decoders are capable of decoding informations that consist of N bits of address and 12-N bits of data. Of this series, the HT12D is arranged to provide 8 address bits and 4 data bits, and HT12F is used to decode 12 bits of address information.
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Selection Table
Part No. HT12F Function Address No. 8 12 Data No. 4 0 Type L 3/4 VT O O Oscillator Trigger Package
HT12D
RC oscillator DIN active Hi 18 DIP/20 SOP RC oscillator DIN active Hi 18 DIP/20 SOP
Notes: Data type: L stands for latch type data output. VT can be used as a momentary data output.
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212 Series of Decoders
Block Diagram
OSC2 OSC1
O s c illa to r
D iv id e r
D a ta S h ift R e g is te r
L a tc h C ir c u it
D a ta
D IN
B u ffe r
D a ta D e te c to r
S y n c . D e te c to r
C o m p a ra to r
C o m p a ra to r
C o n tr o l L o g ic
T r a n s m is s io n G a te C ir c u it
B u ffe r
VT
A d d re s s
VDD
VSS
Note: The address/data pins are available in various combinations (see the address/data table).
Pin Assignment
8 -A d d re s s 4 -D a ta
A0 A1 A2 A3 A4 A5 A6 A7 VSS 9 8 7 6 5 4 3 2 1 18 17 16 15 14 13 12 11 10 VDD VT OSC1 OSC2 D IN D11 D10 D9 D8
8 -A d d re s s 4 -D a ta
NC 1 2 3 4 5 6 7 8 9 10 A0 A1 A2 A3 A4 A5 A6 A7 VSS 20 19 18 17 16 15 14 13 12 11 NC VDD VT OSC1 OSC2 D IN D11 D10 D9 D8
1 2 -A d d re s s 0 -D a ta
A0 A1 A2 A3 A4 A5 A6 A7 VSS 9 8 7 6 5 4 3 2 1 18 17 16 15 14 13 12 11 10 VDD VT OSC1 OSC2 D IN A11 A10 A9 A8
1 2 -A d d re s s 0 -D a ta
NC 1 2 3 4 5 6 7 8 9 10 A0 A1 A2 A3 A4 A5 A6 A7 VSS 20 19 18 17 16 15 14 13 12 11 NC VDD VT OSC1 OSC2 D IN A11 A10 A9 A8
H T12D 1 8 D IP
H T12D 20 SO P
H T12F 1 8 D IP
H T12F 20 SO P
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212 Series of Decoders
Pin Description
Pin Name A0~A11 D8~D11 DIN VT OSC1 OSC2 VSS VDD I/O I O I O I O I I Internal Connection Description
NMOS Input pins for address A0~A11 setting TRANSMISSION They can be externally set to VDD or VSS. GATE CMOS OUT CMOS IN CMOS OUT OSCILLATOR OSCILLATOR 3/4 3/4 Output data pins Serial data input pin Valid transmission, active high Oscillator input pin Oscillator output pin Negative power supply (GND) Positive power supply
Approximate internal connection circuits
NMOS T R A N S M IS S IO N GATE CMOS OUT C M O S IN O S C IL L A T O R
EN OSC1
OSC2
Absolute Maximum Ratings
Supply Voltage...............................-0.3V to 13V Input Voltage....................VSS-0.3 to VDD+0.3V Storage Temperature.................-50C to 125C Operating Temperature ..............-20C to 75C
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
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212 Series of Decoders
Electrical Characteristics
Symbol VDD ISTB IDD Parameter Operating Voltage Standby Current Operating Current Data Output Source Current (D8~D11) Data Output Sink Current (D8~D11) VT Output Source Current VT Output Sink Current H Input Voltage L Input Voltage Oscillator Frequency Test Conditions VDD 3/4 5V 12V 5V 5V 5V 5V 5V 5V 5V Conditions 3/4 Oscillator stops No load fOSC=150kHz VOH=4.5V VOL=0.5V VOH=4.5V VOL=0.5V 3/4 3/4 ROSC=51kW Min. 2.4 3/4 3/4 3/4 -1 1 -1 1 3.5 0 3/4 Typ. 5 0.1 2 200 -1.6 1.6 -1.6 1.6 3/4 3/4 150 Max. 12 1 4 400 3/4 3/4 3/4 3/4 5 1 3/4 Ta=25C Unit V mA mA mA mA mA mA mA V V kHz
IO
IVT VIH VIL fOSC
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212 Series of Decoders
Functional Description
Operation The 2 series of decoders provides various combinations of addresses and data pins in differ12 ent packages so as to pair with the 2 series of encoders. The decoders receive data that are transmitted by an encoder and interpret the first N bits of code period as addresses and the last 12-N bits as data, where N is the address code number. A signal on the DIN pin activates the oscillator which in turn decodes the incoming address and data. The decoders will then check the received address three times continuously. If the received address codes all match the contents of the decoders local address, the 12-N bits of data are decoded to activate the output pins and the VT pin is set high to indicate a valid transmission. This will last unless the address code is incorrect or no signal is received. The output of the VT pin is high only when the transmission is valid. Otherwise it is always low. Output type Of the 2 series of decoders, the HT12F has no data output pin but its VT pin can be used as a momentary data output. The HT12D, on the other hand, provides 4 latch type data pins whose data remain unchanged until new data are received. Part Data Address Output Operating No. Pins Pins Type Voltage HT12D HT12F 4 0 8 12 Latch 3/4 2.4V~12V 2.4V~12V
No
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Flowchart The oscillator is disabled in the standby state and activated when a logic high signal applies to the DIN pin. That is to say, the DIN should be kept low if there is no signal input.
Pow eron
S ta n d b y m o d e D is a b le V T & ig n o r e th e r e s t o f th is w o r d
No
C o d e in ? Yes A d d r e s s b its m a tc h e d ? Yes S to re d a ta No
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M a tc h p r e v io u s s to r e d d a ta ? Yes No 3 tim e s o f c h e c k in g c o m p le te d ? Yes L a tc h d a ta to o u tp u t & a c tiv a te V T A d d re s s o r d a ta e rro r ? Yes
No
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212 Series of Decoders
Decoder timing
E ncoder T r a n s m is s io n E n a b le E ncoder DOUT 4 w o rd s 2 D ecoderV T check L a tc h e d D a ta O u t check
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< 1 w o rd
c lo c k s
T r a n s m itte d C o n tin u o u s ly
4 w o rd s 2
14
c lo c k s
Encoder/Decoder cross reference table Decoders Part No. Package Data Pins Address Pins VT Pair Encoder HT12A HT12E HT12A HT12E Encoder DIP 4 0 8 12 O O 18 18 18 18 SOP 20 20 20 20 Decoder DIP 18 18 SOP 20 20
HT12D HT12F
Address/Data sequence
The following table provides address/data sequence for various models of the 2 series of decoders. A correct device should be chosen according to the requirements of the individual addresses and data. Part No. HT12D HT12F Address/Data Bits 0 A0 A0 1 A1 A1 2 A2 A2 3 A3 A3 4 A4 A4 5 A5 A5 6 A6 A6 7 A7 A7 8 D8 A8 9 D9 A9 10 D10 A10 11 D11 A11
12
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212 Series of Decoders
Oscillator frequency vs supply voltage
fo s c (S c a le ) 4 .0 0 R o s c (9 )
27k 3 .5 0 30k 33k 36k 39k 2 .5 0 43k 47k 51k 2 .0 0 56k 62k 68k 75k 1 .5 0 82k 100k (1 0 0 k H z )1 .0 0 120k 150k 180k 0 .5 0 0 .2 5 220k
3 .0 0
2
3
4
5
6
7
8
9
10
11
12
13
VDD
(V D C )
The recommended oscillator frequency is fOSCD (decoder) @ 50 fOSCE (HT12E encoder) 1 @ fOSCE (HT12A encoder). 3
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212 Series of Decoders
Application Circuits
R e c e iv e r C ir c u it 1 2 3 4 5 6 7 8 9 A0 A1 A2 A3 A4 A5 A6 A7 VSS VDD VT OSC1 OSC2 D IN D11 D10 D9 D8 18 17 16 15 14 13 12 11 10 9 8 7 6 ROSC 4 5 3 VDD 1 2 R e c e iv e r C ir c u it A0 A1 A2 A3 A4 A5 A6 A7 VSS VDD VT OSC1 OSC2 D IN A11 A10 A9 A8 18 17 16 15 14 13 12 11 10 ROSC VDD
HT12D
HT12F
Notes: Typical infrared receiver: PIC-12043T/PIC-12043S (KODESHI CORP.) or LTM9052 (LITEON CORP.) Typical RF receiver: JR-200 (JUWA CORP.) RE-99 (MING MICROSYSTEM, U.S.A.)
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Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Microelectronics Enterprises Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright a 1999 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
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